1. Field of the Invention.
The invention relates to personal communications systems that minimize power dissipation by controlling power supply voltage and clock frequency.
2. Related Art.
Portable electronic devices have become part of many aspects of personal, business and recreational activities and tasks. The popularity of various portable personal electronic communications systems, such as portable phones, portable televisions, and personal pagers, continues to increase. As the popularity of portable electronic systems has increased, so has the demand for smaller, lighter and more power efficient devices, that may operate for longer periods of time. Manufacturers continually try to increase the time a portable device may operate on a set of batteries or between battery charges. Increased time between battery charges or changes may be a significant marketing advantage.
Manufacturers have attempted to increase operational time of portable devices by producing batteries with higher energy densities, and attempting to produce circuitry that consumes less power. A benefit of reduced power consumption, in addition to an increase in operational time, is an increased reliability due to reduction of temperature increases in the devices during operation. Reduced operating temperatures are generally a consequence of reduced power dissipation.
One method to reduce power consumption is to employ digital designs. One reason for replacing analog communication systems with digital communications systems is that digital systems, generally may offer increased performance and lower overall power consumption than those of analog systems. Digital systems may dissipate less power than analog systems because digital systems typically operate using only two distinct values, ones and zeroes. These values are commonly created by semiconductors that are in a saturated state or a cut off state. In the saturation state, current flows through the device, but the voltage across the device is low. Power dissipated is equal to the voltage across the device multiplied by the current flowing through the device. The power dissipated by a device in the saturation state is equal to the amount of current flowing through the device multiplied by the saturation voltage. Because the saturation voltage across the device is low, the power is also low. In the cut off state, the voltage across a device is usually at a maximum. The current through the device, however, is low and may commonly be zero or a low leakage value. Because the cut off current is low, the power dissipated in the device is also low. Digital circuits commonly are in either a cutoff or saturation state during operation, except for the times when they are switching between states.
Generally, digital devices dissipate most of their power during the period when they are switching states. The amount of power dissipated during switching is generally dependent on the voltage of the power supply that powers the digital devices. In other words, the higher the power supply voltage, the more power will be dissipated when the device switches. Digital devices also tend to switch faster at higher power supply voltages. For the forgoing reasons, manufacturers of digital circuits, particularly in the case of portable applications, may find it advantageous to design circuits with the slowest possible clock rate at the lowest possible power supply voltage. Circuits designed for the slowest possible clock rate and the lowest possible power supply voltage are commonly submitted to a design method called worst case analysis.
In a worst case analysis, the circuit variables are assumed to be skewed so as to provide the worst conditions for circuit operation. For example, if a minimum clock rate of 1 MHz were desired, it would be assumed that the power supply was at it""s lowest (i.e. worst case) operating voltage. If the worst case voltage could support a 1 MHz operation, then the reasoning is, higher operating voltages could support operating frequencies greater than 1 MHz because increasing power supply voltage generally tends to allow digital devices to switch faster. Operating voltages higher than the worst case minimum could support clock rates above 1 MHz. Worst case design assumes that all parameters are at their worst, and then calculates parameters, such as operating voltage, to determine what minimum value of operating voltage will guarantee that the circuitry will continue to function.
A problem with worst case design is that worst cases rarely, if ever occur. The worst case actually may have only a statistically infinitesimal chance of occurring, and be unrealistic in practice. Because circuitry may be designed for the case, the worst case, that may not ever occur the circuitry does not operate as efficiently as if it had been designed for normal operating conditions. In some cases, circuitry designed for normal conditions could be operated more efficiently at lower power supply voltages than a worst case design would indicate is possible. Thus, a circuit design for operation under worst case conditions may not result in the most efficient design.
Dynamically adjusting the power supply voltage and clock frequency of digital circuitry, may be particularly useful in power sensitive applications. Worst case design for digital circuits may be calculated based on propagation time within the digital circuits. Propagation time is commonly defined as the time that a signal takes to travel through a digital circuit and to become stable at the output of the circuit. In general, digital circuits are synchronous circuits, typically synchronized by means of a clock. A clock functions to synchronize the changing of digital values within the circuit. A clock cycle may be commonly divided into two different portions. The first, or active, portion of the clock cycle is when signal levels are input into to a circuit. During the active portion of the clock cycle, it is common to refer to the values as being clocked into the circuit.
The second portion, or settling portion, of the clock cycle is the time period when no signals are input to the circuit. During the settling portion of the clock cycle, the signals, that were presented to the inputs of the circuit during the active portion of the clock cycle, propagate through the circuits. At the end of the settling portion of the clock cycle, all signals should have propagated through the circuit and become stable. If the settling time portion of the clock cycle is not sufficiently long, some signals may be still propagating through the circuit at the end of the settling time portion of the clock cycle and may not be stable at the end of the settling time. If signals are still changing when the active portion of the clock cycle occurs, incorrect values may be coupled into circuit inputs. If the settling time of the clock cycle is not long enough, the circuit input values that are being coupled from one circuit to another may still be changing when the active portion of the clock cycle arrives.
If conditions are such that input values are changing, when the active portion of a clock cycle occurs, the condition is commonly known as a xe2x80x9crace.xe2x80x9d Race conditions exist when the propagation delay, i.e. the time a signal takes to travel through a circuit, exceeds the settling time portion of the clock cycle. When a race condition exists the performance of the circuit may be degraded, and the circuit may be unpredictable or may even be inoperative for its intended purpose. To avoid problems due to inadequate settling time, the settling time of the clock circuit must be long enough to avoid all circuit races. To avoid a race condition within a circuit, the circuit clock may be slowed to allow more propagation time for the signals in the circuit, or the propagation speed of the signal through the circuit may be increased. Increasing the power supply voltage of a digital circuit will generally increase the speed of signal propagation through that circuit.
The propagation speed of a circuit may be changed by adjusting the power supply voltage in order to adjust the propagation speed of signals in the circuit, for example, to avoid race conditions. By actively measuring the propagation delay of signals through a circuit, and adjusting the power supply voltages accordingly, a circuit design may be free from the constraint of selecting the power supply voltage for a theoretical worst case signal propagation time. Instead of designing the circuit for the theoretical worst case propagation time, the speed of propagation may be dynamically adjusted to match the actual propagation time within a circuit. By setting the power supply, in order to achieve the propagation speed needed, circuitry may be run at lower voltages. By running circuitry at lower voltages than a theoretical worst case, power dissipation may be lowered.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.